[RISCV][LegalizeIntegerTypes] Teach PromoteSetCCOperands not to sext i32 comparisons...
authorCraig Topper <craig.topper@sifive.com>
Sat, 1 Jan 2022 01:13:36 +0000 (17:13 -0800)
committerCraig Topper <craig.topper@sifive.com>
Sat, 1 Jan 2022 01:15:20 +0000 (17:15 -0800)
commitd00e438cfe7ef6af6654810a34ef461988e93172
tree484392c732c9cd3d77de9020238d1a274522a5f5
parent8637be74a038ece5f97040895963e0ef6797f324
[RISCV][LegalizeIntegerTypes] Teach PromoteSetCCOperands not to sext i32 comparisons for RV64 if the promoted values are already zero extended.

This is similar to what is done for targets that prefer zero extend
where we avoid using a zero extend if the promoted values are sign
extended.

We'll also check for zero extended operands for ugt, ult, uge, and ule when the
target prefers sign extend. This is different than preferring zero extend, where
we only check for sign bits on equality comparisons.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D116421
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/test/CodeGen/RISCV/fpclamptosat.ll
llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll
llvm/test/CodeGen/RISCV/half-convert.ll