[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of...
authorCraig Topper <craig.topper@intel.com>
Tue, 2 Jul 2019 17:51:02 +0000 (17:51 +0000)
committerCraig Topper <craig.topper@intel.com>
Tue, 2 Jul 2019 17:51:02 +0000 (17:51 +0000)
commitcffbaa93b72b307904935c380f90d49d00c7ecdc
treea31e28a995d70ea4c8c32a9287f21210880fe0eb
parent36face4c1df75c1e4e82c3f26b0b98495af9359e
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.

Similar for (V)MOVSD. Ultimately, I'd like to see about folding
scalar_to_vector+load to vzload. Which would select as (V)MOVSSrm
so this is closer to that.

llvm-svn: 364948
21 files changed:
llvm/lib/Target/X86/X86InstrAVX512.td
llvm/lib/Target/X86/X86InstrSSE.td
llvm/test/CodeGen/X86/avx2-masked-gather.ll
llvm/test/CodeGen/X86/build-vector-512.ll
llvm/test/CodeGen/X86/buildvec-insertvec.ll
llvm/test/CodeGen/X86/copysign-constant-magnitude.ll
llvm/test/CodeGen/X86/fp128-cast.ll
llvm/test/CodeGen/X86/gather-addresses.ll
llvm/test/CodeGen/X86/half.ll
llvm/test/CodeGen/X86/insert-into-constant-vector.ll
llvm/test/CodeGen/X86/masked_expandload.ll
llvm/test/CodeGen/X86/masked_load.ll
llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll
llvm/test/CodeGen/X86/mmx-build-vector.ll
llvm/test/CodeGen/X86/pr2656.ll
llvm/test/CodeGen/X86/pr30430.ll
llvm/test/CodeGen/X86/select-of-fp-constants.ll
llvm/test/CodeGen/X86/sse-fcopysign.ll
llvm/test/CodeGen/X86/var-permute-128.ll
llvm/test/CodeGen/X86/vector-shuffle-variable-128.ll
llvm/test/CodeGen/X86/vector-shuffle-variable-256.ll