clk: renesas: r8a779g0: Fix OSC predividers
authorGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 29 Nov 2022 16:53:25 +0000 (17:53 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 26 Dec 2022 10:00:05 +0000 (11:00 +0100)
commitcf919770d05a9b7d10b1609d0b66bc5db8e78a3e
treed2e3174992ca8522c3519038eb859603f782f47b
parent868695e43b94c7ea08155fee29d57b414b7ab060
clk: renesas: r8a779g0: Fix OSC predividers

According to the table in Note 5 for the OSC clock in Table 8.1.4e
("Lists of CPG clocks generated from PLL5") of the R-Car V4H Series
Hardware User's Manual Rev. 0.54, the predividers for the OSC clock are
16 resp. 32 when using a 16.66 resp. 33.33 MHz external crystal.

Fixes: 0ab55cf1834177a2 ("clk: renesas: cpg-mssr: Add support for R-Car V4H")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/dcd572acc584c237f70d2309e038f25040236a87.1669740722.git.geert+renesas@glider.be
drivers/clk/renesas/r8a779g0-cpg-mssr.c