[PATCH] RS6000 Add testlsbb by Byte operations
authorWill Schmidt <will_schmidt@vnet.ibm.com>
Thu, 21 May 2020 20:21:34 +0000 (15:21 -0500)
committerWill Schmidt <will_schmidt@vnet.ibm.com>
Thu, 30 Jul 2020 17:40:12 +0000 (12:40 -0500)
commitcf5d0fc2d1adcd53b52c5d3f946822b687546c0b
tree7eee2dee44493b6b85cece27991332f7e18ede1d
parentc931e8d5a96463427040b0d11f9c4352ac22b2b0
[PATCH] RS6000 Add testlsbb by Byte operations

Add support for new instructions to test LSB by Byte.

2020-07-29  Will Schmidt  <will_schmidt@vnet.ibm.com>

gcc/ChangeLog:

* config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define.
(vec_test_lsbb_all_zeros): New define.
* config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in
handling macro.
(XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines.
(xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads.
* config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS,
P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries.
* config/rs6000/rs6000.md (UNSPEC_XVTLSBB):  New unspec.
* config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define.
(xvtlsbbo, xvtlsbbz): New instruction expands.

gcc/testsuite/ChangeLog:

* gcc.target/powerpc/lsbb-runnable.c: New test.
* gcc.target/powerpc/lsbb.c: New test.
gcc/config/rs6000/altivec.h
gcc/config/rs6000/rs6000-builtin.def
gcc/config/rs6000/rs6000-call.c
gcc/config/rs6000/rs6000.md
gcc/config/rs6000/vsx.md
gcc/testsuite/gcc.target/powerpc/lsbb-runnable.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/lsbb.c [new file with mode: 0644]