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(parent: 401c07e) | patch
Actually generate SSE5 instructions
authorH. Peter Anvin <hpa@zytor.com>
Tue, 18 Sep 2007 00:25:27 +0000 (17:25 -0700)
committerH. Peter Anvin <hpa@zytor.com>
Tue, 18 Sep 2007 00:25:27 +0000 (17:25 -0700)
commitcf5180a9553e43bbaa46fd1a77c75dc8b7f6da42
treee49a78cca72852670b210bce53f4c5698fc4c7bftree | snapshot
parent401c07e20d14130a2d147468a408fce9edd1faffcommit | diff
Actually generate SSE5 instructions

This checkin completes what is required to actually generate SSE5
instructions.  No support in the disassembler yet.

This checkin covers:

- Support for actually generating DREX prefixes.
- Support for matching operand "operand X must match Y"
assemble.c diff | blob | history
insns.dat diff | blob | history
insns.h diff | blob | history
insns.pl diff | blob | history
nasm.h diff | blob | history
test/fmsub.asm [new file with mode: 0644] blob
Domain: System / Toolchain;