iio: xilinx-xadc: Fix clearing interrupt when enabling trigger
authorLars-Peter Clausen <lars@metafoo.de>
Fri, 3 Apr 2020 13:27:14 +0000 (15:27 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 29 Apr 2020 14:33:13 +0000 (16:33 +0200)
commitcf2849c9ef46d78a5c800a2ddb3caca5c7b36ee4
tree0c4cc5c49b8d3dfd9f96920aecd709ad5dfb69f1
parent6a956eb2e1a70ad0e9097c8b3f7084e7532c17e1
iio: xilinx-xadc: Fix clearing interrupt when enabling trigger

commit f954b098fbac4d183219ce5b42d76d6df2aed50a upstream.

When enabling the trigger and unmasking the end-of-sequence (EOS) interrupt
the EOS interrupt should be cleared from the status register. Otherwise it
is possible that it was still set from a previous capture. If that is the
case the interrupt would fire immediately even though no conversion has
been done yet and stale data is being read from the device.

The old code only clears the interrupt if the interrupt was previously
unmasked. Which does not make much sense since the interrupt is always
masked at this point and in addition masking the interrupt does not clear
the interrupt from the status register. So the clearing needs to be done
unconditionally.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/iio/adc/xilinx-xadc-core.c