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(parent: b0d6e0a) | patch
clock: G12A: fine-tune pcie/common pll parameters
authorQiufang Dai <qiufang.dai@amlogic.com>
Wed, 31 Jan 2018 09:53:16 +0000 (17:53 +0800)
committerYixun Lan <yixun.lan@amlogic.com>
Fri, 2 Mar 2018 07:07:52 +0000 (15:07 +0800)
commitcf13cbd5a0b89c966294d2af85ace49bdd08ac0f
tree70b48390759ac404d609d7c383cfb36ddb7e13c8tree | snapshot
parentb0d6e0a082ad1dede40814bc4227bdbaeba9a1bccommit | diff
clock: G12A: fine-tune pcie/common pll parameters

PD#156734: clock: G12A: fine-tune pcie/common pll parameters

Change-Id: Ifbd8d07928deeebaa35c4f950efc290b1648394e
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
drivers/amlogic/clk/clkc.h diff | blob | history
drivers/amlogic/clk/g12a/g12a.c diff | blob | history
drivers/amlogic/clk/g12a/g12a_clk-pll.c diff | blob | history
Domain: System / Kernel;