[RISC-V] Implement emulate single step feature. (#94711)
authorMikhail Kurinnoi <m.kurinnoi@samsung.com>
Wed, 15 Nov 2023 01:52:53 +0000 (04:52 +0300)
committerGleb Balykov <g.balykov@samsung.com>
Fri, 15 Dec 2023 12:28:32 +0000 (15:28 +0300)
commitcf0c2bf6eb5b5616739b0636e6fb3ab9855c7337
treec4a5883d03cb4471a99b5db18c8492a4e2266912
parent6349e0a6c956723a03b4b084ece270b3edb53ecf
[RISC-V] Implement emulate single step feature. (#94711)

* [RISC-V] Implement emulate single step feature.

* [RISC-V] Fix clang16 build error.

Error message  /home/clamp/runtime/src/coreclr/debug/inc/riscv64/primitives.h:52:5: error: integer value -1 is outside the valid range of values [0, 255] for this enumeration type [-Wenum-constexpr-conversion]
              (CorDebugRegister)(-1), // X0 is zero register that is not a real register. We need padding here for proper mapping with ICorDebugInfo::RegNum.
              ^

* [RISC-V] Fix sign bit.
src/coreclr/clrdefinitions.cmake
src/coreclr/debug/ee/controller.cpp
src/coreclr/debug/ee/debugger.cpp
src/coreclr/debug/ee/riscv64/primitives.cpp
src/coreclr/debug/inc/riscv64/primitives.h
src/coreclr/inc/stdmacros.h
src/coreclr/vm/CMakeLists.txt
src/coreclr/vm/riscv64/singlestepper.cpp [new file with mode: 0644]
src/coreclr/vm/riscv64singlestepper.h [new file with mode: 0644]
src/coreclr/vm/threads.h