clk: renesas: Add r8a7790 CPG Core Clock Definitions
authorGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 16 Oct 2015 09:41:19 +0000 (11:41 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 24 May 2017 08:19:42 +0000 (10:19 +0200)
commitcedd162b4dae134a9c5862109afd9ee95bd73520
tree5c1c9f41e077e49a486c8772a586d5393f1ea473
parent4013047a65b376b960a2144b3d125944c8c280bc
clk: renesas: Add r8a7790 CPG Core Clock Definitions

Add all R-Car H2 Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2a ("List of Clocks [R-Car H2]") of the R-Car Gen2 Hardware
User's Manual rev. 2.00.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
include/dt-bindings/clock/r8a7790-cpg-mssr.h [new file with mode: 0644]