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(parent: c338f0b) | patch
mx6: Fix reset cause for Power On Reset case
authorFabio Estevam <fabio.estevam@freescale.com>
Tue, 13 Mar 2012 07:26:48 +0000 (07:26 +0000)
committerStefano Babic <sbabic@denx.de>
Tue, 27 Mar 2012 07:41:16 +0000 (09:41 +0200)
commitcece262209aaacf6f842c8d15832f882eb2467d8
tree120ab774df6120121c3124f4e029bb4b7feff53ftree | snapshot
parentc338f0b5c60d3b133139539fdfc39d2f2cb29b06commit | diff
mx6: Fix reset cause for Power On Reset case

After booting mx6qsabrelite from POR the following is reported:

CPU:   Freescale i.MX61 family rev1.0 at 792 MHz
Reset cause: unknown reset

This is because both the POR and WDOG bits are set after reset.

Fix this by also checking both bits in the POR case.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
arch/arm/cpu/armv7/imx-common/cpu.c diff | blob | history
Domain: System / Kernel;