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(parent: 1870392) | patch
drm/amdgpu: Enable RLCG read/write interface for Sienna Cichlid
authorRohit Khaire <rohit.khaire@amd.com>
Fri, 4 Jun 2021 15:32:42 +0000 (11:32 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 4 Jun 2021 20:02:50 +0000 (16:02 -0400)
commitcec7e80fbff58cdfd6595e7d11d7b2a38545c2e4
tree99c984824bad17e40c44c621048b86b5eeae3fb2tree | snapshot
parent18703923a66aecf6f7ded0e16d22eb412ddae72fcommit | diff
drm/amdgpu: Enable RLCG read/write interface for Sienna Cichlid

Enable this only for Sienna Cichild
since only Navi12 and Sienna Cichlid support SRIOV

Signed-off-by: Rohit Khaire <rohit.khaire@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c diff | blob | history
Domain: System / Kernel;