RDMA/mlx5: Add support in MEMIC operations
authorMaor Gottlieb <maorg@nvidia.com>
Sun, 11 Apr 2021 12:29:23 +0000 (15:29 +0300)
committerJason Gunthorpe <jgg@nvidia.com>
Tue, 13 Apr 2021 22:36:36 +0000 (19:36 -0300)
commitcea85fa5dbc2e0206b58095c0c12ff035b11d129
tree00c098cae1670379fab2db547b292971407fb358
parent39cc792ff2e8d7814b322547514ef1e3ce5c36a5
RDMA/mlx5: Add support in MEMIC operations

MEMIC buffer, in addition to regular read and write operations, can
support atomic operations from the host.

Introduce and implement new UAPI to allocate address space for MEMIC
operations such as atomic. This includes:

1. Expose new IOCTL for request mapping of MEMIC operation.
2. Hold the operations address in a list, so same operation to same DM
   will be allocated only once.
3. Manage refcount on the mlx5_ib_dm object, so it would be keep valid
   until all addresses were unmapped.

Link: https://lore.kernel.org/r/20210411122924.60230-7-leon@kernel.org
Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/hw/mlx5/dm.c
drivers/infiniband/hw/mlx5/dm.h
drivers/infiniband/hw/mlx5/main.c
drivers/infiniband/hw/mlx5/mlx5_ib.h
include/uapi/rdma/mlx5_user_ioctl_cmds.h