AMDGPU: VALU carry-in and v_cndmask condition cannot be EXEC
authorNicolai Haehnle <nhaehnle@gmail.com>
Fri, 29 Sep 2017 15:37:31 +0000 (15:37 +0000)
committerNicolai Haehnle <nhaehnle@gmail.com>
Fri, 29 Sep 2017 15:37:31 +0000 (15:37 +0000)
commitce4ddd06dad33ce272dce9784a0edd1d957ab208
tree3b82546c98ac13bbe87342ed7876aff4b4f10342
parent8fb270c691631cca5a99cfb26c7b238581b10a49
AMDGPU: VALU carry-in and v_cndmask condition cannot be EXEC

The hardware will only forward EXEC_LO; the high 32 bits will be zero.

Additionally, inline constants do not work. At least,

   v_addc_u32_e64 v0, vcc, v0, v1, -1

which could conceivably be used to combine (v0 + v1 + 1) into a single
instruction, acts as if all carry-in bits are zero.

The llvm.amdgcn.ps.live test is adjusted; it would be nice to combine

   s_mov_b64 s[0:1], exec
   v_cndmask_b32_e64 v0, v1, v2, s[0:1]

into

   v_mov_b32 v0, v3

but it's not particularly high priority.

Fixes dEQP-GLES31.functional.shaders.helper_invocation.value.*

llvm-svn: 314522
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.td
llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.td
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
llvm/test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir
llvm/test/CodeGen/AMDGPU/shrink-carry.mir
llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir