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[AArch64] Teach DAGCombiner that converting two consecutive loads into a vector load...
authorJames Molloy <james.molloy@arm.com>
Sat, 2 Aug 2014 14:51:24 +0000 (14:51 +0000)
committerJames Molloy <james.molloy@arm.com>
Sat, 2 Aug 2014 14:51:24 +0000 (14:51 +0000)
commitce45be04656bd33b6c35367677982293a06da7cc
tree5bd05a4b002a1cf48d2eaec2ea546d0fa501a3c2tree | snapshot
parent8c112d838c34cef46adcf97bc1538f6ec24eb0b3commit | diff
[AArch64] Teach DAGCombiner that converting two consecutive loads into a vector load is not a good transform when paired loads are available.

The combiner was creating Q-register loads and stores, which then had to be spilled because there are no callee-save Q registers!

llvm-svn: 214634
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff | blob | history
llvm/test/CodeGen/AArch64/paired-load.ll [new file with mode: 0644] blob
Domain: System / Toolchain;