net/mlx5: Fix PPLM register mapping
authorAya Levin <ayal@nvidia.com>
Sun, 4 Apr 2021 07:50:50 +0000 (10:50 +0300)
committerSaeed Mahameed <saeedm@nvidia.com>
Wed, 7 Apr 2021 04:04:35 +0000 (21:04 -0700)
commitce28f0fd670ddffcd564ce7119bdefbaf08f02d3
treee55fef57d76d63422e0b8abbea6cd80ab43bc760
parenta14587dfc5ad2312dabdd42a610d80ecd0dc8bea
net/mlx5: Fix PPLM register mapping

Add reserved mapping to cover all the register in order to avoid
setting arbitrary values to newer FW which implements the reserved
fields.

Fixes: a58837f52d43 ("net/mlx5e: Expose FEC feilds and related capability bit")
Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
include/linux/mlx5/mlx5_ifc.h