dt-bindings: PCI: dwc: Add Baikal-T1 PCIe Root Port bindings
authorSerge Semin <Sergey.Semin@baikalelectronics.ru>
Sun, 13 Nov 2022 19:12:55 +0000 (22:12 +0300)
committerLorenzo Pieralisi <lpieralisi@kernel.org>
Wed, 23 Nov 2022 15:01:55 +0000 (16:01 +0100)
commitce27c4e61f2dcc41d13f54cbecbd3a4b15db86c8
treef58ba6c10596e9be2fd644d6680d2e9d26ec1b6c
parent98b59129cb9f43a37bb92a577145f29ca54353a7
dt-bindings: PCI: dwc: Add Baikal-T1 PCIe Root Port bindings

Baikal-T1 SoC is equipped with DWC PCIe v4.60a Root Port controller, which
link can be trained to work on up to Gen.3 speed over up to x4 lanes. The
controller is supposed to be fed up with four clock sources: DBI
peripheral clock, AXI application Tx/Rx clocks and external PHY/core
reference clock generating the 100MHz signal. In addition to that the
platform provide a way to reset each part of the controller:
sticky/non-sticky bits, host controller core, PIPE interface, PCS/PHY and
Hot/Power reset signal. The Root Port controller is equipped with multiple
IRQ lines like MSI, system AER, PME, HP, Bandwidth change, Link
equalization request and eDMA ones. The registers space is accessed over
the DBI interface. There can be no more than four inbound or outbound iATU
windows configured.

Link: https://lore.kernel.org/r/20221113191301.5526-15-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/pci/baikal,bt1-pcie.yaml [new file with mode: 0644]