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[ARC] Add codegen for the readcyclecounter intrinsic along with disassembly for assoc...
authorThomas Johnson <thomasj@synopsys.com>
Tue, 24 Aug 2021 17:22:34 +0000 (10:22 -0700)
committerMark Schimmel <marksl@synopsys.com>
Tue, 24 Aug 2021 18:53:20 +0000 (11:53 -0700)
commitce1dc9d647a7b00eac9a4db33bb7e615e08d5fc2
tree3e3aba29d64073f36c8c0e526e13e5d27d6b12a2tree | snapshot
parent15375631049acbf9c5729754ad5623a2670120a3commit | diff
[ARC] Add codegen for the readcyclecounter intrinsic along with disassembly for associated instructions

Differential Revision: https://reviews.llvm.org/D108598
llvm/lib/Target/ARC/ARCISelLowering.cpp diff | blob | history
llvm/lib/Target/ARC/ARCISelLowering.h diff | blob | history
llvm/lib/Target/ARC/ARCInstrFormats.td diff | blob | history
llvm/lib/Target/ARC/ARCInstrInfo.td diff | blob | history
llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp diff | blob | history
llvm/test/CodeGen/ARC/intrinsics.ll diff | blob | history
llvm/test/MC/Disassembler/ARC/ldst.txt diff | blob | history
Domain: System / Toolchain;