drm/amd/display: Fix DC definition of PMFW Pstate table for DCN316
authorLeo Li <sunpeng.li@amd.com>
Thu, 24 Feb 2022 17:06:22 +0000 (12:06 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 24 Feb 2022 22:25:57 +0000 (17:25 -0500)
commitce075e75e5e3b1274735118f0a417e79d68f426a
tree734c4fd51c8bf2685eaf5583ec993569f07a2ce9
parent2656fd230d21ab765eaea24f6b264a744919f13a
drm/amd/display: Fix DC definition of PMFW Pstate table for DCN316

[Why]

During DC init, we read power management tables from PMFW. This info is
exchanged in the form of a binary blob inside gpu memory. In order to
parse the binary blob, the correct struct needs to be used.

[How]

Fix dcn316's definition of the DfPstateTable_t struct to align with PMFW

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.h