Generation of adjusted ldp/stp for vector types
authorPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>
Wed, 22 Jul 2020 09:14:39 +0000 (10:14 +0100)
committerPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>
Wed, 22 Jul 2020 09:22:11 +0000 (10:22 +0100)
commitcd91a084877dabcc53aec57ab70ca4fc32f3d985
tree45e021672be7374e47b47cc99b1596c5d35629b4
parente93676fb5385200b249cd1c53d95e1d6f717edaa
Generation of adjusted ldp/stp for vector types

Introduce simple peephole2 optimization which substitutes a sequence of
four consecutive load or store (LDR, STR) instructions with two load or
store pair (LDP, STP) instructions for 2 element supported vector modes
(V2SI, V2SF, V2DI, and V2DF).
Generated load / store pair instruction offset is adjusted accordingly.

Bootstrapped and tested on aarch64-none-linux-gnu.

Example:
$ cat stp_vec_v2sf.c
typedef float __attribute__((vector_size(8))) vec;

void
store_adjusted(vec *out, vec x, vec y)
{
  out[400] = x;
  out[401] = y;
  out[402] = y;
  out[403] = x;
}

Example compiled with:
$ ./aarch64-none-linux-gnu-gcc -S -O2 stp_vec_v2sf.c -dp

Before the patch:

store_adjusted:
    str     d0, [x0, 3200]    // 9    [c=4 l=4]  *aarch64_simd_movv2si/2
    str     d1, [x0, 3208]    // 11   [c=4 l=4]  *aarch64_simd_movv2si/2
    str     d1, [x0, 3216]    // 13   [c=4 l=4]  *aarch64_simd_movv2si/2
    str     d0, [x0, 3224]    // 15   [c=4 l=4]  *aarch64_simd_movv2si/2
    ret       // 26       [c=0 l=4]  *do_return

After the patch:

store_adjusted:
    add     x1, x0, 3200    // 27   [c=4 l=4]  *adddi3_aarch64/0
    stp     d0, d1, [x1]    // 28   [c=0 l=4]  vec_store_pairv2siv2si
    stp     d1, d0, [x1, 16]        // 29   [c=0 l=4]  vec_store_pairv2siv2si
    ret             // 22   [c=0 l=4]  *do_return

gcc/ChangeLog:

* config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector
V2SI, V2SF, V2DI, V2DF load pair and store pair modes.
* config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
Change mode parameter to machine_mode.
(aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to
machine_mode.
* config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
Change mode parameter to machine_mode.
(aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode.
* config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/ldp_vec_v2sf.c: New test.
* gcc.target/aarch64/ldp_vec_v2si.c: New test.
* gcc.target/aarch64/stp_vec_v2df.c: New test.
* gcc.target/aarch64/stp_vec_v2di.c: New test.
* gcc.target/aarch64/stp_vec_v2sf.c: New test.
* gcc.target/aarch64/stp_vec_v2si.c: New test.
gcc/config/aarch64/aarch64-ldpstp.md
gcc/config/aarch64/aarch64-protos.h
gcc/config/aarch64/aarch64.c
gcc/config/aarch64/iterators.md
gcc/testsuite/gcc.target/aarch64/ldp_vec_v2sf.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/ldp_vec_v2si.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/stp_vec_v2df.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/stp_vec_v2di.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/stp_vec_v2sf.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/stp_vec_v2si.c [new file with mode: 0644]