[ARM] Rewrite how VCMP are lowered, using a single node
authorDavid Green <david.green@arm.com>
Wed, 24 Jul 2019 17:36:47 +0000 (17:36 +0000)
committerDavid Green <david.green@arm.com>
Wed, 24 Jul 2019 17:36:47 +0000 (17:36 +0000)
commitcd7a6fa314953f71af0686bd0fcc8f6a8cb133bf
treefe7ddd1b2e512c1d0bc2dc955ac1338d73acc674
parent7d318b2bb19771745021145730387d43c589a9a7
[ARM] Rewrite how VCMP are lowered, using a single node

This removes the VCEQ/VCNE/VCGE/VCEQZ/etc nodes, just using two called VCMP and
VCMPZ with an extra operand as the condition code. I believe this will make
some combines simpler, allowing us to just look at these codes and not the
operands. It also helps fill in a missing VCGTUZ MVE selection without adding
extra nodes for it.

Differential Revision: https://reviews.llvm.org/D65072

llvm-svn: 366934
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/ARM/ARMISelLowering.h
llvm/lib/Target/ARM/ARMInstrInfo.td
llvm/lib/Target/ARM/ARMInstrMVE.td
llvm/lib/Target/ARM/ARMInstrNEON.td
llvm/test/CodeGen/Thumb2/mve-pred-and.ll
llvm/test/CodeGen/Thumb2/mve-pred-or.ll
llvm/test/CodeGen/Thumb2/mve-pred-xor.ll
llvm/test/CodeGen/Thumb2/mve-vcmpz.ll