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[AMDGPU] Add wave barrier builtin
authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Tue, 15 Nov 2016 18:58:03 +0000 (18:58 +0000)
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Tue, 15 Nov 2016 18:58:03 +0000 (18:58 +0000)
commitcd433d28118b345ba367420cbed1acd8fb1e4ea3
treea7afd7892452f19f469b01ea5941faf4d60d382btree | snapshot
parent8013e81defde4bef3b3df32b0b477be122e4e90dcommit | diff
[AMDGPU] Add wave barrier builtin

The wave barrier represents the discardable barrier. Its main purpose is to
carry convergent attribute, thus preventing illegal CFG optimizations. All lanes
in a wave come to convergence point simultaneously with SIMT, thus no special
instruction is needed in the ISA. The barrier is discarded during code generation.

Differential Revision: https://reviews.llvm.org/D26584

llvm-svn: 287006
clang/include/clang/Basic/BuiltinsAMDGPU.def diff | blob | history
clang/test/CodeGenOpenCL/builtins-amdgcn.cl diff | blob | history
Domain: System / Toolchain;