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(parent: 56d11d5) | patch
drm/amd/powerplay: fix sclk setting for profile mode for CZ/ST
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 29 Aug 2017 14:55:05 +0000 (10:55 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 1 Sep 2017 19:01:21 +0000 (15:01 -0400)
commitcd00a424d26f9b954f5a084b88800e859fc0c52f
tree87a0f8495f1eb9be98fa4dd6dc97d5b4a1ea1cb9tree | snapshot
parent56d11d580974958bd3c7ae4a42368ae22cb50354commit | diff
drm/amd/powerplay: fix sclk setting for profile mode for CZ/ST

Need to select dpm0 to avoid clock fluctuations.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c diff | blob | history
Domain: System / Kernel;