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arm64: errata: Group all Cortex-A510 errata together
authorRob Herring <robh@kernel.org>
Thu, 6 Jul 2023 20:30:31 +0000 (14:30 -0600)
committerWill Deacon <will@kernel.org>
Thu, 27 Jul 2023 09:57:55 +0000 (10:57 +0100)
commitcce8365fc47b053ab1ea9dcc8cd8c8466e53fcde
treefb9b24f6fe4dc6dab686ad770c9d11f56a6bcf7dtree | snapshot
parent6eaae198076080886b9e7d57f4ae06fa782f90efcommit | diff
arm64: errata: Group all Cortex-A510 errata together

There are 2 sections of Cortex-A510 errata. As the ordering within
vendors is in order by CPU/IP name, move the 2nd section up to the 1st
section of A510 errata.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230706203030.276437-1-robh@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Documentation/arch/arm64/silicon-errata.rst diff | blob | history
Domain: System / Kernel;