[X86] Add a DAG combine to turn v16i16->v16i8 VTRUNCUS+store into a saturating trunca...
authorCraig Topper <craig.topper@intel.com>
Fri, 11 Oct 2019 04:16:49 +0000 (04:16 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 11 Oct 2019 04:16:49 +0000 (04:16 +0000)
commitccc85ac85569c55b6915180d8b722812b4a226b6
tree69a963a8a2970d0b9a7ca4858329a8120b5fe54f
parent4b9947e2e76e1e7b1ec0b2fdb9609b2850a20812
[X86] Add a DAG combine to turn v16i16->v16i8 VTRUNCUS+store into a saturating truncating store.

llvm-svn: 374509
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/min-legal-vector-width.ll