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(parent: 036e9ef) | patch
dmaengine: fsldma: set BWC, DAHTS and SAHTS values correctly
authorThomas Breitung <thomas.breitung@izt-labs.de>
Mon, 19 Jun 2017 14:40:04 +0000 (16:40 +0200)
committerVinod Koul <vinod.koul@intel.com>
Thu, 22 Jun 2017 13:01:35 +0000 (18:31 +0530)
commitccc077292733f3143b444255fa5ec49a8ff2763b
treef867c7838c806b891adcb7e3c955d5e8bbe74817tree | snapshot
parent036e9ef8becde736e693be4f4bef56d5b56fc298commit | diff
dmaengine: fsldma: set BWC, DAHTS and SAHTS values correctly

The bits of BWC, DAHTS and SAHTS in the DMA mode register must be cleared
before a new value can be or-ed in.

Signed-off-by: Thomas Breitung <thomas.breitung@izt-labs.de>
Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
drivers/dma/fsldma.c diff | blob | history
drivers/dma/fsldma.h diff | blob | history
Domain: System / Kernel;