[SystemZ] Allow specifying integer registers as part of the address calculation
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Wed, 8 Jul 2020 16:17:03 +0000 (18:17 +0200)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Wed, 8 Jul 2020 16:20:24 +0000 (18:20 +0200)
commitcca8578efab096fddcb0134b28b17f4758e9afa0
treeac4906ad0c67dc302635f390f4a53def2b173ba8
parent3fa989d4fd6b854209ba4e950d96b91d6d5797b4
[SystemZ] Allow specifying integer registers as part of the address calculation

Revision e1de2773a534957305d7a559c6d88c4b5ac354e2 provided support for
accepting integer registers in inline asm i.e.

__asm("lhi %r0, 5") -> lhi %r0, 5
__asm("lhi 0, 5") -> lhi 0,5

This patch aims to extend this support to instructions which compute
addresses as well. (i.e instructions of type BDMem and BD[X|R|V|L]Mem)

Author: anirudhp

Differential Revision: https://reviews.llvm.org/D83251
llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
llvm/test/MC/SystemZ/insn-bad.s
llvm/test/MC/SystemZ/insn-good-z13.s
llvm/test/MC/SystemZ/insn-good-z14.s
llvm/test/MC/SystemZ/insn-good-z15.s
llvm/test/MC/SystemZ/insn-good.s
llvm/test/MC/SystemZ/regs-good.s
llvm/test/MC/SystemZ/tokens.s