drm/i915: Clarify RC6 enabling
authorBen Widawsky <benjamin.widawsky@intel.com>
Wed, 29 Jan 2014 04:25:38 +0000 (20:25 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 12 Feb 2014 17:53:12 +0000 (18:53 +0100)
commitcca84a1fff513d8f9a862f5ef5b062ad0f60a9f4
tree0f2b94588595663ed08b1ae44d17d2fc6b121d6a
parent7ad25d488faf2622d5c1c3c04e42e8efe9539da0
drm/i915: Clarify RC6 enabling

At one time, we though all future platforms would have the deeper RC6
states. As it turned out, they killed it after Ivybridge, and began
using other means to achieve the power savings (the stuff we need to get
to PC7+).

The enable function was left in a weird state of odd corner cases as a
result. Since the future is now, and we also have some insight into
what's currently the future, we have an opportunity to simplify, and
future proof the function.

NOTE: VLV will be addressed in a subsequent patch. This patch was trying
not to change functionality.

NOTE2: All callers sanitize the return value anyway, so this patch is
simply to have the code make a bit more sense.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Deepak S <deepak.s@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c