drm/i915: properly set HSW WM_LP watermarks
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 31 May 2013 14:45:06 +0000 (11:45 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 31 May 2013 18:54:14 +0000 (20:54 +0200)
commitcca32e9ad372172c808b93eebff536459ce37d85
tree16e386436331a152ff35cb725462ab23c7c45c77
parent801bcfffbb0721d7131e930f9a46103e539c43a4
drm/i915: properly set HSW WM_LP watermarks

We were previously only setting the WM_PIPE registers, now we are
setting the LP watermark registers. This should allow deeper PC
states, resulting in power savings.

We're only using 1/2 data buffer partitioning for now.

v2: Merge both hsw_compute_pri_wm_* functions (Ville)
v3: - Simplify hsw_compute_wm_results (Ville)
    - Rebase due to changes on the previous patch
v4: Unconfuse wm_lp/level (Ville)

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c