media: tegra-video: Compute settle times based on the clock rate
authorSowjanya Komatineni <skomatineni@nvidia.com>
Wed, 12 Aug 2020 00:27:21 +0000 (02:27 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Fri, 28 Aug 2020 13:14:16 +0000 (15:14 +0200)
commitcc9d3fa2d599675a940be5fdbf46f01d6d236a24
tree1abe77734d22e702ba54f7ae6074e21c48ca392b
parent523c857e34ce025b993e4f85864644f579a08aac
media: tegra-video: Compute settle times based on the clock rate

Settle time determines the number of cil clock cyles to wait after
LP00 when moving from LP to HS.

This patch computes T-CLK-SETTLE and T-HS-SETTLE times based on cil
clock rate and pixel rate from the sensor and programs them during
streaming.

T-CLK-SETTLE time is the interval during which receiver will ignore
any HS transitions on clock lane starting from the beginning of
T-CLK-PREPARE.

T-HS-SETTLE time is the interval during which recevier will ignore
any HS transitions on data lane starting from the beginning of
T-HS-PREPARE.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/staging/media/tegra-video/TODO
drivers/staging/media/tegra-video/csi.c
drivers/staging/media/tegra-video/csi.h
drivers/staging/media/tegra-video/tegra210.c