projects / platform / kernel / linux-amlogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: e86a954) | patch
hdmitx: modify fractional part of hpll for gxtvbb [1/1]
authorHang Cheng <hang.cheng@amlogic.com>
Fri, 26 Jul 2019 09:29:14 +0000 (17:29 +0800)
committerTao Zeng <tao.zeng@amlogic.com>
Tue, 30 Jul 2019 13:23:45 +0000 (06:23 -0700)
commitcc7872eb97fb397260dd6f38e2484a8e33120e6a
treec422d7f926e1a77484e80a7177e44cc4e3037601tree | snapshot
parente86a954deedfc0fd8ce508dda226e9b4a8cabfbbcommit | diff
hdmitx: modify fractional part of hpll for gxtvbb [1/1]

PD#TV-8224

Problem:
hdmitx output clk is not right, actually output 145Mhz
when expect to output 148.5Mhz. for gxtvbb, bit[11]
of DIV_FRAC bit[11:0] is used for +/- symbol, but now
is used for fractional weight by mistake.

Solution:
change back to original setting for DIV_FRAC

Verify:
TCL-T966

Change-Id: Idd34a745d4b74a0bd9e6f2b3542af94731d5badd
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c diff | blob | history
Domain: System / Kernel;