drivers: perf: Implement perf event mmap support in the SBI backend
authorAlexandre Ghiti <alexghiti@rivosinc.com>
Wed, 2 Aug 2023 08:03:25 +0000 (10:03 +0200)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 16 Aug 2023 14:28:20 +0000 (07:28 -0700)
commitcc4c07c89aada16229084eeb93895c95b7eabaa3
tree8e07323460ea0e9cf4644239e7fd2ff07a9c6c8a
parent50be342829053d6d4a3c66eacc0e778f6611a37a
drivers: perf: Implement perf event mmap support in the SBI backend

We used to unconditionnally expose the cycle and instret csrs to
userspace, which gives rise to security concerns.

So now we only allow access to hw counters from userspace through the perf
framework which will handle context switches, per-task events...etc. A
sysctl allows to revert the behaviour to the legacy mode so that userspace
applications which are not ready for this change do not break.

But the default value is to allow userspace only through perf: this will
break userspace applications which rely on direct access to rdcycle.
This choice was made for security reasons [1][2]: most of the applications
which use rdcycle can instead use rdtime to count the elapsed time.

[1] https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/REWcwYnzsKE?pli=1
[2] https://www.youtube.com/watch?v=3-c4C_L2PRQ&ab_channel=IEEESymposiumonSecurityandPrivacy

Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
drivers/perf/riscv_pmu.c
drivers/perf/riscv_pmu_sbi.c