aarch64: Prevent use of SIMD fcvtz[su] instruction variant with "nosimd"

aarch64: Prevent use of SIMD fcvtz[su] instruction variant with "nosimd"

Currently, SF->SI and DF->DI conversions on Aarch64 with the "nosimd"
flag provided sometimes cause the emitting of a vector variant of the
fcvtz[su] instruction (e.g. fcvtzu s0, s0).

This modifies the corresponding pattern to only select the vector
variant of the instruction when generating code with SIMD enabled.

gcc/ChangeLog:

	* config/aarch64/aarch64.md
	(<optab>_trunc<fcvt_target><GPI:mode>2): Set the "arch"
	attribute to disambiguate between SIMD and FP variants of the
	instruction.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/fcvt_nosimd.c: New test.