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(parent: 83cb963) | patch
[AArch64][SVE] Improve fixed length codegen for common vector shuffle case
authorBradley Smith <bradley.smith@arm.com>
Tue, 22 Jun 2021 15:34:15 +0000 (16:34 +0100)
committerBradley Smith <bradley.smith@arm.com>
Mon, 5 Jul 2021 11:09:27 +0000 (12:09 +0100)
commitcc273983f705ebfbbe42d6327a626ce87c494c96
tree14f62682bd582c7c90bd9457461478a359ce57c5tree | snapshot
parent83cb9632a13d97753181e8b3e417b7836b414e26commit | diff
[AArch64][SVE] Improve fixed length codegen for common vector shuffle case

Improve codegen when lowering the common vector shuffle case from the
vectorizer (op1[last]:op2[0:last-1]). This patch only handles this
common case as it is difficult to handle this more generally when using
fixed length vectors, due to being unable to use the SVE ext instruction.

Differential Revision: https://reviews.llvm.org/D105289
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp diff | blob | history
llvm/lib/Target/AArch64/AArch64ISelLowering.h diff | blob | history
llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle.ll [new file with mode: 0644] blob
Domain: System / Toolchain;