drm/amd/display: Allow asic specific FSFT timing optimization
authorReza Amini <Reza.Amini@amd.com>
Wed, 15 Jul 2020 15:33:23 +0000 (11:33 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Jul 2020 18:13:04 +0000 (14:13 -0400)
commitcc0f379dd2bb34ee247222ff822b52319a755652
tree4064c2c5f19d0645096d54d29de4cd2494cc4185
parent9b6ca29e093660241002c91e2c8abf771c726921
drm/amd/display: Allow asic specific FSFT timing optimization

[Why]
Each asic can optimize best based on its capabilities

[How]
Optimizing timing for a new pixel clock

Signed-off-by: Reza Amini <Reza.Amini@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_stream.c
drivers/gpu/drm/amd/display/dc/dc_stream.h
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_init.c
drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
drivers/gpu/drm/amd/display/modules/freesync/freesync.c