igb/e1000e: update PSSR_MDIX value to reflect correct bit
authorAlexander Duyck <alexander.h.duyck@intel.com>
Tue, 26 May 2009 13:51:05 +0000 (13:51 +0000)
committerDavid S. Miller <davem@davemloft.net>
Wed, 27 May 2009 03:35:06 +0000 (20:35 -0700)
commitcbe7a81a7370e2c4560b48e42e741bd1476bc700
tree06909d59a09cac98dcfd6221b67a6bcf3bf6e6ff
parent3ea73afafb8cd237a823ec5d0a0a2f2396b03b33
igb/e1000e: update PSSR_MDIX value to reflect correct bit

The phy port status register has the MDI-X status bit on bit 11, not bit 3
as is currently setup in the define.  This patch corrects that so the
correct bit is checked on igp PHY types.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Acked-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/e1000e/hw.h
drivers/net/igb/e1000_phy.h