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mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR
authorBenoît Thébaudeau <benoit@wsystem.com>
Tue, 30 May 2017 09:14:08 +0000 (11:14 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Tue, 20 Jun 2017 08:30:32 +0000 (10:30 +0200)
commitcbb4509374963bea440c15ff26e2501d15e7927a
tree6c6361184aac4a6002c400ee850321a6f2584431tree | snapshot
parentd04f8d5b949d972918ef8174d7702275ff6dbb08commit | diff
mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR

The eSDHC can only DMA from 32-bit-aligned addresses.

This fixes the following test cases of mmc_test:
  11: Badly aligned write
  12: Badly aligned read
  13: Badly aligned multi-block write
  14: Badly aligned multi-block read

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-esdhc.h diff | blob | history
Domain: System / Kernel;