[AMDGPU] Define SGPR_NULL64 register. NFCI.
authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Fri, 10 Jun 2022 17:58:39 +0000 (10:58 -0700)
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Mon, 13 Jun 2022 20:23:33 +0000 (13:23 -0700)
commitcb9ae93712464858c8deaf18dea25d41a9d5212a
tree0cb8e04487b79ed95d909adef772f2f3de9b0e80
parent7316b0d54c3d00d9142c881f0c3f400b664c30b4
[AMDGPU] Define SGPR_NULL64 register. NFCI.

On gfx10+ null register can be used as both 32 and 64 bit operand.
Define a 64 bit version of the register to use during codegen.

Differential Revision: https://reviews.llvm.org/D127527
llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.td
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp