radeonsi: set the clear/copy cache policy based on L2 cache size
authorMarek Olšák <marek.olsak@amd.com>
Fri, 19 Mar 2021 21:41:59 +0000 (17:41 -0400)
committerMarge Bot <eric+marge@anholt.net>
Fri, 2 Apr 2021 12:05:00 +0000 (12:05 +0000)
commitcb59cae04c32c9ffaedd16e91d96fabbe7c9e3ea
treeaafc5ea1dc21f9f756586afbf7c960049f1c1257
parent8ea685dfc0d31fe0eeb127f3cb13307f34bc163b
radeonsi: set the clear/copy cache policy based on L2 cache size

This matches the intent.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>
src/gallium/drivers/radeonsi/si_compute_blit.c