clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent
authorChen-Yu Tsai <wens@csie.org>
Fri, 30 Nov 2018 05:33:28 +0000 (13:33 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 21 Dec 2019 09:41:20 +0000 (10:41 +0100)
commitcb57e6880b338f8871702add20b98fb967888c63
treeaf41562560d6c7273c9b39f61278fd5d8a2c3f47
parent40806e7ef8d1eaceafde720f5a178bd02c2fd6c3
clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent

[ Upstream commit 7bb7d29cffdd24bf419516d14b6768591e74069e ]

The third parent of CSI_MCLK is PLL_PERIPH1, not PLL_PERIPH0.
Fix it.

Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks")
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/clk/sunxi-ng/ccu-sun8i-h3.c