serial: sirf: use uart_port's fifosize for fifo related operation
authorQipan Li <Qipan.Li@csr.com>
Wed, 29 Apr 2015 06:45:09 +0000 (06:45 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 10 May 2015 17:01:20 +0000 (19:01 +0200)
commitcb4595a2158371f8180b226fce42a47086585d5c
tree600445be898867d65b14d1a0e2a10c4859236dc9
parenta6ffe8966acbb66bbff03bb9273dfe88b04585c2
serial: sirf: use uart_port's fifosize for fifo related operation

In SiRF platform, there are different fifo size of uart and usp,
with the fifosize configuration changes in different chips, we
can not use port line to decide how to check FIFO full,empty and
level.

There is a direct mapping between FIFO HW register layout with
fifo size, so move to use fifosize as the input to check fifo
status.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/sirfsoc_uart.c
drivers/tty/serial/sirfsoc_uart.h