x86/cr4: Sanitize CR4.PCE update
authorThomas Gleixner <tglx@linutronix.de>
Tue, 21 Apr 2020 09:20:30 +0000 (11:20 +0200)
committerBorislav Petkov <bp@suse.de>
Fri, 24 Apr 2020 17:01:17 +0000 (19:01 +0200)
commitcb2a02355b042ec3ef11d0ba2a46742678e41632
tree618c7b32b616ef12f39858249b6f67581dd16029
parentd8f0b35331c4423e033f81f10eb5e0c7e4e1dcec
x86/cr4: Sanitize CR4.PCE update

load_mm_cr4_irqsoff() is really a strange name for a function which has
only one purpose: Update the CR4.PCE bit depending on the perf state.

Rename it to update_cr4_pce_mm(), move it into the tlb code and provide a
function which can be invoked by the perf smp function calls.

Another step to remove exposure of cpu_tlbstate.

No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200421092559.049499158@linutronix.de
arch/x86/events/core.c
arch/x86/include/asm/mmu_context.h
arch/x86/mm/tlb.c