[AArch64][clang] implement 2022 General Data-Processing instructions
authorTies Stuij <ties.stuij@arm.com>
Tue, 22 Nov 2022 12:38:47 +0000 (12:38 +0000)
committerTies Stuij <ties@stuij.se>
Tue, 22 Nov 2022 14:23:12 +0000 (14:23 +0000)
commitcb261e30fbb174085d2eea4f4afc3cef2838b7f7
tree32b759acfadd45f00f6958e04691f56110f23ec5
parent9e7febb4f73c8584f622d4dad17be5417938eb10
[AArch64][clang] implement 2022 General Data-Processing instructions

This patch implements the 2022 Architecture General Data-Processing Instructions

They include:

Common Short Sequence Compression (CSSC) instructions
- scalar comparison instructions
  SMAX, SMIN, UMAX, UMIN (32/64 bits) with or without immediate
- ABS (absolute), CNT (count non-zero bits), CTZ (count trailing zeroes)
- command-line options for CSSC

Associated with these instructions in the documentation is the Range Prefetch
Memory (RPRFM) instruction, which signals to the memory system that data memory
accesses from a specified range of addresses are likely to occur in the near
future. The instruction lies in hint space, and is made unconditional.

Specs for the individual instructions can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/

contributors to this patch:
- Cullen Rhodes
- Son Tuan Vu
- Mark Murray
- Tomas Matheson
- Sam Elliott
- Ties Stuij

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D138488
40 files changed:
clang/test/Driver/aarch64-cssc.c [new file with mode: 0644]
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64SystemOperands.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
llvm/test/MC/AArch64/CSSC/abs_32.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/abs_64.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/cnt_32.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/cnt_64.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/ctz_32.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/ctz_64.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/smax_32_imm.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/smax_32_reg.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/smax_64_imm.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/smax_64_reg.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/smin_32_imm.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/smin_32_reg.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/smin_64_imm.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/smin_64_reg.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/umax_32_imm.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/umax_32_reg.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/umax_64_imm.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/umax_64_reg.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/umin_32_imm.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/umin_32_reg.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/umin_64_imm.s [new file with mode: 0644]
llvm/test/MC/AArch64/CSSC/umin_64_reg.s [new file with mode: 0644]
llvm/test/MC/AArch64/armv8.9a-cssc.s [new file with mode: 0644]
llvm/test/MC/AArch64/rprfm.s [new file with mode: 0644]
llvm/test/MC/Disassembler/AArch64/armv8.9a-cssc.txt [new file with mode: 0644]
llvm/unittests/Support/TargetParserTest.cpp