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(parent: 05a717f) | patch
Blackfin arch: noMMU CPLB lookup tables can be in L1 SRAM
authorMike Frysinger <vapier.adi@gmail.com>
Tue, 18 Nov 2008 09:48:22 +0000 (17:48 +0800)
committerBryan Wu <cooloney@kernel.org>
Tue, 18 Nov 2008 09:48:22 +0000 (17:48 +0800)
commitcb15e57cc7d68e524f709c9a541b4900df80df16
tree1562f9bc1d2df008ffbb230f315fb2677154d022tree | snapshot
parent05a717fbc893c777165b00821b9dcde968a95bcccommit | diff
Blackfin arch: noMMU CPLB lookup tables can be in L1 SRAM

 - unify duplicate page_size_table definitions
 - make sure it is placed alongside the other cplb switching code

Pointed-out-by: Michael McTernan <mmcternan@airvana.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
arch/blackfin/kernel/cplb-nompu/cplbmgr.S diff | blob | history
arch/blackfin/kernel/cplbinfo.c diff | blob | history
Domain: System / Uncategorized;