AMDGPU: Adjust register allocation priority values down
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 23 Jul 2022 14:22:41 +0000 (10:22 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 25 Jul 2022 19:47:15 +0000 (15:47 -0400)
commitcb0c71e8b198aedd7569c0561ad3efba1d3d5766
treeb8d84741ada71550ed58ee300d98e8f5d7a57340
parentd61d72dae604c3258e25c00622b1a85861450303
AMDGPU: Adjust register allocation priority values down

Set the priorities consistently to number of registers in the tuple -
1. Previously we started at 1, and also tried to give SGPR higher
values than VGPRs. There's no point in assigning SGPRs higher values
now that those are allocated in a separate regalloc run.

This avoids overflowing the 5 bits used for the class priority in the
allocation heuristic for 32 element tuples. This avoids some cases
where smaller registers unexpectedly get prioritized over larger.
llvm/lib/Target/AMDGPU/SIRegisterInfo.td
llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir
llvm/test/CodeGen/AMDGPU/indirect-call.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
llvm/test/CodeGen/AMDGPU/srem64.ll
llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
llvm/test/CodeGen/AMDGPU/urem64.ll