staging:iio:dac:ad5446: Consolidate store_sample and store_pwr_down functions

staging:iio:dac:ad5446: Consolidate store_sample and store_pwr_down functions

The devices supported by this drivers only have a single shift register, which
contains both the power down mode and the output sample. So writing the power
down mode and the output sample can be done by the same function. Call this
function prepare_write as it will prepare the spi message for a write. Also
introduce a small helper function which performs the whole write by calling the
chip the specific prepare function followed by a spi_sync.

The two power down bits are always placed ontop of the msb of the output sample,
so we can easily calculate their position by adding the channels shift to the
channels realbits.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>