[TSan] Align thread_registry_placeholder
authorIlya Leoshkevich <iii@linux.ibm.com>
Tue, 13 Jul 2021 13:51:47 +0000 (15:51 +0200)
committerIlya Leoshkevich <iii@linux.ibm.com>
Thu, 15 Jul 2021 10:18:47 +0000 (12:18 +0200)
commitcadbb9241627eefc9f589ae4376fd9ed3e272ecc
tree7aba45b0335dbe7997a6269d90067efc59da9c6a
parent54128b73f8336ffe5cfd89cc860e58c3bb38a425
[TSan] Align thread_registry_placeholder

s390x requires ThreadRegistry.mtx_.opaque_storage_ to be 4-byte
aligned. Since other architectures may have similar requirements, use
the maximum thread_registry_placeholder alignment from other
sanitizers, which is 64 (LSan).

Reviewed By: dvyukov

Differential Revision: https://reviews.llvm.org/D105629
compiler-rt/lib/tsan/rtl/tsan_rtl.cpp