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[clang-format] Recognize Verilog non-blocking assignment
authorsstwcw <f0gukp2nk@protonmail.com>
Mon, 6 Feb 2023 00:57:03 +0000 (00:57 +0000)
committersstwcw <f0gukp2nk@protonmail.com>
Mon, 6 Feb 2023 00:58:11 +0000 (00:58 +0000)
commitcad708b9a1ecbf5645706056bb7c4fc0ea4721b6
tree9225a6f7d8fb6d663cedfc8b6d693cedde934191tree | snapshot
parent26182dfa3600f33995c20214a226eb482331fb01commit | diff
[clang-format] Recognize Verilog non-blocking assignment

Reviewed By: HazardyKnusperkeks, owenpan

Differential Revision: https://reviews.llvm.org/D142891
clang/lib/Format/TokenAnnotator.cpp diff | blob | history
clang/lib/Format/WhitespaceManager.cpp diff | blob | history
clang/unittests/Format/FormatTestVerilog.cpp diff | blob | history
clang/unittests/Format/TokenAnnotatorTest.cpp diff | blob | history
Domain: System / Toolchain;