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(parent: 4393fc1) | patch
PowerPC: Optimized finite/finitef for POWER8
authorAdhemerval Zanella <azanella@linux.vnet.ibm.com>
Thu, 27 Feb 2014 15:46:46 +0000 (09:46 -0600)
committerAdhemerval Zanella <azanella@linux.vnet.ibm.com>
Thu, 27 Feb 2014 18:58:33 +0000 (12:58 -0600)
commitcac626d60a863e48ab75417064984769e58c5719
tree72cfaf38f3f0ae48808e8a088526c12592dc2febtree | snapshot
parent4393fc119c34e97519b9b7a4fc94066b283be452commit | diff
PowerPC: Optimized finite/finitef for POWER8

This patch add a optimized finite/finitef implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
ChangeLog diff | blob | history
sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile diff | blob | history
sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite-power8.S [new file with mode: 0644] blob
sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c diff | blob | history
sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c diff | blob | history
sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S [new file with mode: 0644] blob
sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S [new file with mode: 0644] blob
Domain: System / Toolchain;