clk: rockchip: fix i2s gate bits on rk3066 and rk3188
authorJohan Jonker <jbx6244@gmail.com>
Wed, 18 Nov 2020 13:58:17 +0000 (14:58 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 29 Nov 2020 19:10:45 +0000 (20:10 +0100)
commitcaa2fd752ecb80faf7a2e1cdadc737187934675e
tree71f87572455d6a03055b6a92a95d630f6c37d4f9
parent5868491e1257786628fdd2457dfb77609f49f91d
clk: rockchip: fix i2s gate bits on rk3066 and rk3188

The Rockchip PX2/RK3066 uses these bits in CRU_CLKGATE7_CON:

hclk_i2s_8ch_gate_en  bit 4 (dtsi: i2s0)
hclk_i2s0_2ch_gate_en bit 2 (dtsi: i2s1)
hclk_i2s1_2ch_gate_en bit 3 (dtsi: i2s2)

The Rockchip PX3/RK3188 uses this bit in CRU_CLKGATE7_CON:

hclk_i2s_2ch_gate_en  bit 2 (dtsi: i2s0)

The bits got somehow mixed up in the clk-rk3188.c file.
The labels in the dtsi files are not suppose to change.
The sclk and hclk names should match for
"trace_event=clk_disable,clk_enable",
so remove GATE HCLK_I2S0 from the common clock tree and
fix the bits in the rk3066 and rk3188 clock tree.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201118135822.9582-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3188.c