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(parent: 21c77de) | patch
drm/amd/pp: Refine the OD state checking code in smu7
authorRex Zhu <Rex.Zhu@amd.com>
Wed, 18 Apr 2018 10:43:19 +0000 (18:43 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 May 2018 18:43:47 +0000 (13:43 -0500)
commitca6e0c5bdc44a2cd7152002191a8107fc566084f
tree5612aae3a7618d1bd0f35d3dd6d70f618be25279tree | snapshot
parent21c77de35661152e118908a081b8a51e7bca7bb4commit | diff
drm/amd/pp: Refine the OD state checking code in smu7

if vddc restore to default value, driver clear the
bit of DPMTABLE_OD_UPDATE_VDDC and need to repopulate sclk
and mclk table.

1. Remove variable i checking code.
2. move clear DPMTABLE_OD_UPDATE_VDDC bit to the end of the
   function to avoid sclk table will not be updated.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c diff | blob | history
Domain: System / Kernel;